Design space exploration of media processors: a generic vliw architecture and a parameterized scheduler

Authors:
Guillermo Payá-Vayá;Javier Martín-Langerwerf;Piriya Taptimthong;Peter Pirsch
Affiliations:
Institute of Microelectronic Systems, University of Hannover, Hannover, Germany;Institute of Microelectronic Systems, University of Hannover, Hannover, Germany;Institute of Microelectronic Systems, University of Hannover, Hannover, Germany;Institute of Microelectronic Systems, University of Hannover, Hannover, Germany
Venue:
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Year:
2007

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Abstract

This paper presents a new environment for exploring and optimizing VLIW architectures for multimedia applications. The environment consists of a generic VLIW architecture, in which virtually all characteristics can be changed, and an assembler with the corresponding parameterized scheduler based on an enhanced version of the list scheduling algorithm. A novel partitioned register file architecture is proposed and analyzed with this environment. This is performed using a highly time consuming task of the H.264 video decoder application. Performance improvements of up to 67% can be achieved when running this application on different architecture configurations.