Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
MOCDEX: multiprocessor on chip multiobjective design space exploration with direct execution
EURASIP Journal on Embedded Systems
SoCDAL: System-on-chip design AcceLerator
ACM Transactions on Design Automation of Electronic Systems (TODAES)
System-platforms-based SystemC TLM design of image processing chains for embedded applications
EURASIP Journal on Embedded Systems
Daedalus: toward composable multimedia MP-SoC design
Proceedings of the 45th annual Design Automation Conference
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
Proceedings of the 45th annual Design Automation Conference
Hi-index | 0.00 |
Embedded system design is increasingly based on single chip multiprocessors because of the high performance and flexibility requirements. Embedded multiprocessors on FPGA provide the additional flexibility by allowing customization through addition of hardware accelerators on FPGA when parallel software implementation does not provide the expected performance. And the overall multiprocessor architecture is still kept for additional applications. This provides a transition to software only parallel implementation while avoiding pure hardware implementation. An automatic design flow is proposed well suited for data flow signal processing exhibiting both pipelining and data parallel mode of execution. Fork-Join model-based software parallelization is explored to find out the best parallelization configuration. C-based synthesis coprocessor is added to improve performance with more hardware resource usage. The Triple Data Encryption Standard (TDES) cryptographic algorithm on a 48-PE single-chip distributed memory multiprocessor is selected as an application example of the flow.