Designing Asynchronous Standby Circuits for a Low-Power Pager
ASYNC '97 Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems
A FIFO Data Switch Design Experiment
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ISMVL '01 Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic
Formal Methods in System Design
Hazard detection in combinational and sequential switching circuits
IBM Journal of Research and Development
Formal Methods in System Design
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We study simulation of gate circuits in algebra C recently introduced by Brzozowski and Ésik. A transient is a word consisting of alternating 0s and 1s; it represents a changing signal. In C, gates process transients instead of 0s and 1s. Simulation in C is capable of counting signal changes, and detecting hazards. We study two simulation algorithms: a general one, A, that works with any state, and Ã, that applies if the initial state is stable. We show that the two algorithms agree in the stable case. We prove the sufficiency of the simulation: all signal changes occurring in binary analysis are also predicted by Algorithm A.