Code generation using tree matching and dynamic programming
ACM Transactions on Programming Languages and Systems (TOPLAS)
A retargetable compiler for ANSI C
ACM SIGPLAN Notices
BURG: fast optimal instruction selection and tree parsing
ACM SIGPLAN Notices
Engineering a simple, efficient code-generator generator
ACM Letters on Programming Languages and Systems (LOPLAS)
Generating instruction sets and microarchitectures from applications
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Synthesis of instruction sets for pipelined microprocessors
DAC '94 Proceedings of the 31st annual Design Automation Conference
Instruction set definition and instruction selection for ASIPs
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Early experience with ASDL in 1cc
Software—Practice & Experience
Optimal Code Generation for Expression Trees
Journal of the ACM (JACM)
Journal of the ACM (JACM)
A Retargetable C Compiler: Design and Implementation
A Retargetable C Compiler: Design and Implementation
Instruction generation and regularity extraction for reconfigurable processors
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Instruction generation for hybrid reconfigurable systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Processor Acceleration Through Automated Instruction Set Customization
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Application-specific instruction generation for configurable processor architectures
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
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Application-specific processors (ASIPs) look very promising as a platform for embedded systems since they comprise both the flexibility of a programmable device and the efficiency of application-specific hardware. A number of approaches to design an application-specific instruction sets were introduced during the last years. We apply the BURS (Bottom-Up Rewrite System) technique which is commonly used for retargetable code generation to this problem. As a result a simple algorithm is presented that generates both instruction set and assembly code from the source program; this algorithm can be used for retargetable code generation as well.