FPL '99 Proceedings of the 9th International Workshop on Field-Programmable Logic and Applications
Hardware architectures for public key cryptography
Integration, the VLSI Journal
Practical Cryptography
Finding collisions in the full SHA-1
CRYPTO'05 Proceedings of the 25th annual international conference on Advances in Cryptology
Reconfigurable trusted computing in hardware
Proceedings of the 2007 ACM workshop on Scalable trusted computing
An FPGA Configuration Scheme for Bitstream Protection
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems
IWSEC '08 Proceedings of the 3rd International Workshop on Security: Advances in Information and Computer Security
Guest Editors’ Introduction to Security in Reconfigurable Systems Design
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Techniques for Design and Implementation of Secure Reconfigurable PUFs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A Protocol for Secure Remote Updates of FPGA Configurations
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
SARFUM: Security Architecture for Remote FPGA Update and Monitoring
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
SeReCon: a secure reconfiguration controller for self-reconfigurable systems
International Journal of Critical Computer-Based Systems
Authenticated encryption for FPGA bitstreams
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Securely sealing Multi-FPGA systems
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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Encryption of volatile FPGA bitstreams provides confidentiality to the design but does not ensure its authenticity. This paper motivates the need for adding authentication to the configuration process by providing application examples where this functionality is useful. An examination of possible solutions is followed by suggesting a practical one in consideration of the FPGA's configuration environment constraints. The solution presented here involves two symmetric-key encryption cores running in parallel to provide both authentication and confidentiality while sharing resources for efficient implementation.