The complexity of finite functions
Handbook of theoretical computer science (vol. A)
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
On the Complexity of Negation-Limited Boolean Networks
SIAM Journal on Computing
On the Inversion Complexity of a System of Functions
Journal of the ACM (JACM)
Higher lower bounds on monotone size
STOC '00 Proceedings of the thirty-second annual ACM symposium on Theory of computing
On the negation-limited circuit complexity of merging
Discrete Applied Mathematics - Special issue: Special issue devoted to the fifth annual international computing and combinatories conference (COCOON'99) Tokyo, Japan 26-28 July 1999
Hauptvortrag: The complexity of negation-limited networks - A brief survey
Proceedings of the 2nd GI Conference on Automata Theory and Formal Languages
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
On the negation-limited circuit complexity of sorting and inverting k-tonic sequences
COCOON'06 Proceedings of the 12th annual international conference on Computing and Combinatorics
Negation-Limited complexity of parity and inverters
ISAAC'06 Proceedings of the 17th international conference on Algorithms and Computation
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A zero-one sequence x1,..., xn is k-tonic if the number of i's such that xi ≠ xi+1 is at most k. The notion generalizes well-known bitonic sequences. In negation-limited complexity, one considers circuits with a limited number of NOT gates, being motivated by the gap in our understanding of monotone versus general circuit complexity, and hoping to better understand the power of NOT gates. In this context, the study of inverters, i.e., circuits with inputs x1,..., xn and outputs ¬x1,..., ¬xn, is fundamental since an inverter with r NOTs can be used to convert a general circuit to one with only r NOTs. In particular, if linear-size log-depth inverter with r NOTs exists, we do not lose generality by only considering circuits with at most r NOTs when we seek superlinear size lower bounds or superlogarithmic depth lower bounds. Markov [JACM1958] showed that the minimum number of NOT gates necessary in an n-inverter is ⌈log2(n + 1)⌉. Beals, Nishino, and Tanaka [SICOMP98-STOC95] gave a construction of an n-inverter with size O(n log n), depth O(log n), and ⌈log2(n + 1)⌉ NOTs. We give a construction of circuits inverting k-tonic sequences with size O((log k) n) and depth O(log k log log n+log n) using log2 n+log2 log2 log2 n+O(1) NOTs. In particular, for the case where k = O(1), our k-tonic inverter achieves asymptotically optimal linear size and logarithmic depth. Our construction improves all the parameters of the k-tonic inverter by Sato, Amano, and Maruoka [COCOON06] with size O(kn), depth O(k log2 n), and O(k log n) NOTs. We also give a construction of k-tonic sorters achieving linear size and logarithmic depth with log2 log2 n+log2 log2 log2 n+O(1) NOT gates for the case where k = O(1). The following question by Turán remains open: Is the size of any depth-O(log n) inverter with O(log n) NOT gates superlinear?.