On the negation-limited circuit complexity of merging

Authors:
Kazuyuki Amano;Akira Maruoka;Jun Tarui
Affiliations:
Graduate School of Information Sciences, Tohoku University, Arakami, Aoba, Sendai 980-8579, Japan;Graduate School of Information Sciences, Tohoku University, Arakami, Aoba, Sendai 980-8579, Japan;Department of Information and Communication Engineering, University of Electro-Communications, Chofu, Tokyo 182-8585, Japan
Venue:
Discrete Applied Mathematics - Special issue: Special issue devoted to the fifth annual international computing and combinatories conference (COCOON'99) Tokyo, Japan 26-28 July 1999
Year:
2003

Citing 9
Cited 10

The monotone circuit complexity of Boolean functions

Combinatorica
Sorting in c log n parallel steps

Combinatorica
On the method of approximations

STOC '89 Proceedings of the twenty-first annual ACM symposium on Theory of computing
The complexity of finite functions

Handbook of theoretical computer science (vol. A)
The art of computer programming, volume 3: (2nd ed.) sorting and searching

The art of computer programming, volume 3: (2nd ed.) sorting and searching
On the Complexity of Negation-Limited Boolean Networks

SIAM Journal on Computing
On the Inversion Complexity of a System of Functions

Journal of the ACM (JACM)
A Superpolynomial Lower Bound for a Circuit Computing the Clique Function with At Most (1/6) log log n Negation Gates

MFCS '98 Proceedings of the 23rd International Symposium on Mathematical Foundations of Computer Science
Hauptvortrag: The complexity of negation-limited networks - A brief survey

Proceedings of the 2nd GI Conference on Automata Theory and Formal Languages

Limiting negations in bounded-depth circuits: an extension of Markov's theorem

Information Processing Letters
Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reductions for monotone Boolean circuits

Theoretical Computer Science
Linear-size log-depth negation-limited inverter for k-tonic binary sequences

Theoretical Computer Science
Limiting Negations in Formulas

ICALP '09 Proceedings of the 36th International Colloquium on Automata, Languages and Programming: Part I
Note: Limiting negations in non-deterministic circuits

Theoretical Computer Science
Linear-size log-depth negation-limited inverter for k-tonic binary sequences

TAMC'07 Proceedings of the 4th international conference on Theory and applications of models of computation
On the negation-limited circuit complexity of sorting and inverting k-tonic sequences

COCOON'06 Proceedings of the 12th annual international conference on Computing and Combinatorics
Reductions for monotone boolean circuits

MFCS'06 Proceedings of the 31st international conference on Mathematical Foundations of Computer Science
Negation-Limited complexity of parity and inverters

ISAAC'06 Proceedings of the 17th international conference on Algorithms and Computation

Quantified Score

Hi-index	0.00

Visualization

Abstract

A negation-limited circuit is a combinational circuit that consists of AND, OR gates and a limited number of NOT gates. In this paper, we investigate the complexity of negation-limited circuits. The (n,n) merging function is a function that merges two presorted binary sequences x1 ≤ ... ≤ xn and y1 ≤ . . . ≤ yn into a sequence z1 ≤ . . . ≤ z2n. We prove that the size complexity of the (n,n) merging function with t = (log2 log2 n - a) NOT gates is Θ(2an).