Dynamic voltage and frequency scaling for scientific applications

  • Authors:
  • Chung-Hsing Hsu;Ulrich Kremer

  • Affiliations:
  • Department of Computer Science, Rutgers University, Piscataway, New Jersey;Department of Computer Science, Rutgers University, Piscataway, New Jersey

  • Venue:
  • LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
  • Year:
  • 2001

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Abstract

Dynamic voltage and frequency scaling (DVFS) of the CPU has been shown to be one of the most effective ways to reduce energy consumption of a program. This paper discusses the benefit of dynamic voltage and frequency scaling for scientific applications under different optimization levels. The reported experiments show that there are still many opportunities to apply DVFS to the highly optimized codes, and the profitability is significant across the benchmarks. It is also observed that there are performance and energy consumption tradeoffs for different optimization levels in the presence of DVFS. While in general compiling for performance will improve energy usage as well, in some cases the less successful optimization lead to higher energy savings. Finally, a comparison of the benefits of operating system support versus compiler support for DVFS is discussed.