Power efficient hardware architecture of SHA-1 algorithm for trusted mobile computing

Authors:
Mooseop Kim;Jaecheol Ryou
Affiliations:
Electronics and Telecommunications Research Institute, Daejeon, South Korea;Division of Electrical and Computer Engineering, Chungnam National University, Daejeon, South Korea
Venue:
ICICS'07 Proceedings of the 9th international conference on Information and communications security
Year:
2007

Citing 4
Cited 4

Cryptography and Network Security: Principles and Practice

Cryptography and Network Security: Principles and Practice
Trusted Computing Platforms: TCPA Technology in Context

Trusted Computing Platforms: TCPA Technology in Context
Trusted Platform Module Basics: Using TPM in Embedded Systems (Embedded Technology)

Trusted Platform Module Basics: Using TPM in Embedded Systems (Embedded Technology)
Optimizing SHA-1 hash function for high throughput with a partial unrolling study

PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation

Hardware evaluation of the Luffa hash family

WESS '09 Proceedings of the 4th Workshop on Embedded Systems Security
SPONGENT: a lightweight hash function

CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC

ACM Transactions on Reconfigurable Technology and Systems (TRETS)
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Quantified Score

Hi-index	0.00

Visualization

Abstract

The Trusted Mobile Platform (TMP) is developed and promoted by the Trusted Computing Group (TCG), which is an industry standard body to enhance the security of the mobile computing environment. The built-in SHA-1 engine in TMP is one of the most important circuit blocks and contributes the performance of the whole platform because it is used as key primitives supporting platform integrity and command authentication. Mobile platforms have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore special architecture and design methods for low power SHA-1 circuit are required. In this paper, we present a novel and efficient hard-ware architecture of low power SHA-1 design for TMP. Our low power SHA-1 hardware can compute 512-bit data block using less than 7,000 gates and has a power consumption about 1.1 mA on a 0.25µm CMOS process.