On the implementation of virtual array using configuration plane

  • Authors:
  • Yong-Sheng Yin;Li Li;Ming-Lun Gao;Gao-Ming Du;Yu-Kun Song

  • Affiliations:
  • Institute of VLSI Design, Hefei University of Technology, Hefei, Anhui, China;Intitute of VLSI Design, Nanjing University, Nanjing, Jiangsu, China;Institute of VLSI Design, Hefei University of Technology, Hefei, Anhui, China and Intitute of VLSI Design, Nanjing University, Nanjing, Jiangsu, China;Institute of VLSI Design, Hefei University of Technology, Hefei, Anhui, China;Institute of VLSI Design, Hefei University of Technology, Hefei, Anhui, China

  • Venue:
  • APPT'07 Proceedings of the 7th international conference on Advanced parallel processing technologies
  • Year:
  • 2007

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Abstract

A new method of designing and using virtual array in pipeline reconfigurable system is presented. This method is based on the partition of the configuration data. Using this method not only is helpful to design the virtual hardware, but also is necessary to investigate the application algorithms oriented this virtual hardware. Basing on the analysis of the space-time graph and the configuration plane, this paper explores the structure and application of virtual array integrated in the MPRS (Multi-Pipeline Reconfigurable System), an in-house developed reconfigurable computing system that utilizes virtual pipeline. Finally, the design procedure of mapping the application to the virtual array and the programming procedure of using the MPRS are illustrated by examples. The experiment results show that the method is feasible and the performance of the MPRS with the virtual array nearly reaches the expected level.