Impact analysis of performance faults in modern microprocessors

Authors:
Naghmeh Karimi;Michail Maniatakos;Chandra Tirumurti;Abhijit Jas;Yiorgos Makris
Affiliations:
ECE Department, University of Tehran;EE Department, Yale University;Strategic CAD Labs, Intel Corporation;Validation and Test Solutions, Intel Corporation;EE Department, Yale University
Venue:
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Year:
2009

Citing 15
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Abstract

Towards improving performance, modern microprocessors incorporate a variety of architectural features, such as branch prediction and speculative execution, which are not critical to the correctness of their operation. While faults in the corresponding hardware may not necessarily affect functional correctness, they may, nevertheless, adversely impact performance. In this paper, we investigate quantitatively the performance impact of such faults using a superscalar, dynamically-scheduled, out-of-order, Alpha-like microprocessor, on which we execute SPEC2000 integer benchmarks. We provide extensive fault simulation-based experimental results and we discuss how this information may guide the inclusion of additional hardware for performance loss recovery and yield enhancement.