A strategy to emulate NOR flash with NAND flash

  • Authors:
  • Yuan-Hao Chang;Jian-Hong Lin;Jen-Wei Hsieh;Tei-Wei Kuo

  • Affiliations:
  • National Taipei University of Technology, Taiwan, Republic of China;National Taiwan University, Taiwan, Republic of China;National Taiwan University of Science and Technology, Taiwan, Republic of China;National Taiwan University, Taiwan, Republic of China

  • Venue:
  • ACM Transactions on Storage (TOS)
  • Year:
  • 2010

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Abstract

This work is motivated by a strong market demand for the replacement of NOR flash memory with NAND flash memory to cut down the cost of many embedded-system designs, such as mobile phones. Different from LRU-related caching or buffering studies, we are interested in prediction-based prefetching based on given execution traces of application executions. An implementation strategy is proposed for the storage of the prefetching information with limited SRAM and run-time overheads. An efficient prediction procedure is presented based on information extracted from application executions to reduce the performance gap between NAND flash memory and NOR flash memory in reads. With the behavior of a target application extracted from a set of collected traces, we show that data access to NOR flash memory can respond effectively over the proposed implementation.