A NOR Emulation Strategy over NAND Flash Memory

Authors:
Jian-Hong Lin;Yuan-Hao Chang;Jen-Wei Hsieh;Tei-Wei Kuo;Cheng-Chih Yang
Affiliations:
National Taiwan University, Taipei, Taiwan 106, R.O.C.;National Taiwan University, Taipei, Taiwan 106, R.O.C.;National Taiwan University, Taipei, Taiwan 106, R.O.C.;National Taiwan University, Taipei, Taiwan 106, R.O.C.;Product Development Firmware Engineering Gruop Genesys Logic, Inc. Taipei, Taiwan 231, R.O.C
Venue:
RTCSA '07 Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
Year:
2007

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Abstract

This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobile phones. Different from LRU-related caching or buffering studies, we are interested in prediction-based prefetching based on given execution traces of application executions. An implementation strategy is proposed in the storage of the prefetching information with limited SRAM and run-time overheads. An efficient prediction procedure is presented based on information extracted from application executions to reduce the performance gap between NAND flash memory and NOR flash memory in reads. With the behavior of a target application extracted from a set of collected traces, we show that data access to NOR flash memory can be responded effectively over the proposed implementation.