An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Efficient on-line identification of hot data for flash-memory management
Proceedings of the 2005 ACM symposium on Applied computing
A log buffer-based flash translation layer using fully-associative sector translation
ACM Transactions on Embedded Computing Systems (TECS)
Endurance enhancement of flash-memory storage systems: an efficient static wear leveling design
Proceedings of the 44th annual Design Automation Conference
A NOR Emulation Strategy over NAND Flash Memory
RTCSA '07 Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications
ACM Transactions on Embedded Computing Systems (TECS)
LAST: locality-aware sector translation for NAND flash memory-based storage systems
ACM SIGOPS Operating Systems Review
Improving Flash Wear-Leveling by Proactively Moving Static Data
IEEE Transactions on Computers
FlashVM: revisiting the virtual memory hierarchy
HotOS'09 Proceedings of the 12th conference on Hot topics in operating systems
FlashVM: virtual memory management on flash
USENIXATC'10 Proceedings of the 2010 USENIX conference on USENIX annual technical conference
A set-based mapping strategy for flash-memory reliability enhancement
Proceedings of the Conference on Design, Automation and Test in Europe
KAST: K-Associative Sector Translation for NAND flash memory in real-time systems
Proceedings of the Conference on Design, Automation and Test in Europe
Demand-based block-level address mapping in large-scale NAND flash storage systems
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
Hi-index | 0.00 |
In recent years, low-cost flash-memory devices have contributed greatly to the rapid growth of the flash memory market. Given that the most of the cost of such devices is the cost of the flash-memory chips, many vendors are managing the cost of such devices by using flash-memory chips of low quality, and they will continue to do so in the near future. Recognizing strong market demand, this work presents a set-based mapping strategy with an effective implementation and low hardware resource requirements for making downgraded flash-memory chips useable in products. A configurable management design for managing chips of various qualities with improved lifetime is presented. The effectiveness of the proposed strategy is evaluated by performing a series of experiments and analyzed with reference to popular implementations in industry.