A functional unit and register binding algorithm for interconnect reduction

Authors:
Taemin Kim;Xun Liu
Affiliations:
Department of Computer Science, University of California, Los Angeles, CA;Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2010

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Abstract

This paper describes a simultaneous register and functional unit (FU) binding algorithm in high level synthesis. Our algorithm targets the reduction of multiplexer inputs, shortening the total length of global interconnects. Specifically, our algorithm maximizes the interconnect sharing among FUs and registers by considering flow dependences, common primary inputs, and common register inputs among operations. Experimental results have shown that our scheme achieves more than 20% multiplexer input count reduction, on average, over previously proposed algorithms. Our approach delivers a 18% wirelength reduction of global interconnects with minor area overhead.