Supply switching with ground collapse for low-leakage register files in 65-nm CMOS

Authors:
Hyung-Ock Kim;Bong Hyun Lee;Jong-Tae Kim;Jung Yun Choi;Kyu-Myung Choi;Youngsoo Shin
Affiliations:
Samsung Electronics, Yongin, Gyeonggi-Do, Korea;Samsung Electronics, Yongin, Gyeonggi-Do, Korea;Samsung Electronics, Yongin, Gyeonggi-Do, Korea;Samsung Electronics, Yongin, Gyeonggi-Do, Korea;Samsung Electronics, Yongin, Gyeonggi-Do, Korea;Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, Korea
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2010

Citing 3
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Abstract

Power-gating has been widely used to reduce subthreshold leakage current. However, the extent of leakage saving through power-gating diminishes with technology scaling due to gate leakage of data-retention circuit elements. Furthermore, power-gating involves substantial increase of area and wirelength. A circuit technique called supply switching with ground collapse (SSGC) has recently been proposed to overcome the limitation of power-gating. The circuit technique is successfully applied to the register file of ARM9 microprocessor in a 1.2 V, 65-nm CMOS process, and the measured result is reported for the first time. The leakage current is reduced by a factor of 960 on average of 83 dies at 25 °C, and by a factor of 150 at 85 °C. Compared to a register file implemented in conventional power-gating, leakage current is cut by a factor of 2.2, demonstrating that SSGC can be a substitute for power-gating in nanometer CMOS.