Analysis and design of a multistage CMOS band-pass low-noise preamplifier for ultrawideband RF receiver

Authors:
S. M. Rezaul Hasan
Affiliations:
Center for Research in Analog and VLSI Microsystem Design, School of Engineering and Advanced Technology, Massey University, Albany, Auckland, New Zealand
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2010

Citing 3
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Abstract

A CMOS low-noise preamplifier for application in a 3.1-10.6-GHz ultrawideband radio-frequency (RF) receiver system is presented. This is essentially a wideband-pass multistage RF preamplifier using a cascade of a three-segment band-pass LC π-section filter with a common-gate stage as the front end. Fundamental design analysis in terms of gain, bandwidth, noise, and impedance matching for the amplifier is presented in detail. The preamplifier was fabricated using the low-cost TSMC 0.18- m 6M1P CMOS process technology. The amplifier delivered a buffered power gain (S21) of ≈ 14 dB with a -3-dB bandwidth (between the corner frequencies) of around 7.5 GHz. It consumed around 30 mW from a 2.5-V supply voltage. It had a minimum passband noise figure of around 4.7 dB, an input-referred third-order intercept point of -5,3 dBm, and reverse isolation (S12) under -65 dB.