Delay fault models and test generation for random logic sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Chip layout optimization using critical path weighting
DAC '84 Proceedings of the 21st Design Automation Conference
Synchronous path analysis in MOS circuit simulator
DAC '82 Proceedings of the 19th Design Automation Conference
Generating Tests for Delay Faults in Nonscan Circuits
IEEE Design & Test
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