Loop optimization in register-transfer scheduling for DSP-systems
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Automatic operator configuration in the synthesis of pipelined architectures
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Redundant operator creation: a scheduling optimization technique
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Sehwa: a program for synthesis of pipelines
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
VLSI and Modern Signal Processing
VLSI and Modern Signal Processing
A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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