An efficient test vector generation for checking analog/mixed-signal functional models

  • Authors:
  • Byong Chan Lim;Jaeha Kim;Mark A. Horowitz

  • Affiliations:
  • Stanford University, Stanford, CA;Seoul National University, Gwanak-gu, Seoul, South Korea;Stanford University, Stanford, CA

  • Venue:
  • Proceedings of the 47th Design Automation Conference
  • Year:
  • 2010

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Abstract

This paper presents an approach to generate test vectors to characterize analog/mixed-signal circuits and its application to check the correspondence between a circuit and its HDL functional model. Interestingly, the abstract behavior of most analog circuits is a linear system, but sometimes only when viewed through a transformation of variables. When linearity holds, validation for the consistency between a circuit and a model can be efficiently performed with a small set of test vectors that grows linearly with the number of analog inputs. The linear abstraction for analog circuits also helps us distinguish different types of analog and digital I/O ports and verify their consistency effectively. We demonstrate the implemented tool by comparing a simple serial link receiver against its functional model.