Model checking algorithms for analog verification

  • Authors:
  • Walter Hartong;Lars Hedrich;Erich Barke

  • Affiliations:
  • University of Hannover, Hannover, Germany;University of Hannover, Hannover, Germany;University of Hannover, Hannover, Germany

  • Venue:
  • Proceedings of the 39th annual Design Automation Conference
  • Year:
  • 2002

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Abstract

In this contribution we present the first method for model checking on nonlinear analog systems. Based on digital CTL model checking algorithms and results in hybrid model checking, we have developed a concept to adapt these ideas to analog systems. Using an automatic state space subdivision method the continuous state space is transfered into a discrete model. In doing this, the most challenging task is to retain the essential nonlinear behavior of the analog system. To describe analog specification properties, an extension to the CTL language is needed. Two small examples show the properties and advantages of this new method and the capability of the implemented prototype tool.