Verification of analog/mixed-signal circuits using labeled hybrid petri nets

  • Authors:
  • Scott Little;Nicholas Seegmiller;David Walter;Chris Myers;Tomohiro Yoneda

  • Affiliations:
  • University of Utah, Salt Lake City, UT;University of Utah, Salt Lake City, UT;University of Utah, Salt Lake City, UT;University of Utah, Salt Lake City, UT;National Inst. of Informatics, Tokyo, Japan

  • Venue:
  • Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 2006

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Abstract

System on a chip design results in the integration of digital, analog, and mixed-signal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling such a heterogeneous set of components. This paper also describes a compiler from VHDL-AMS to LHPNs. To support formal verification, this paper presents an efficient zone-based state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be changing at variable rates. Finally, this paper describes the application of this algorithm to a couple of analog/mixed-signal circuit examples.