The algorithmic analysis of hybrid systems
Theoretical Computer Science - Special issue on hybrid systems
Stable and efficient reduction of substrate model networks using congruence transforms
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Reasoning About Analog-Level Implementationsof Digital Systems
Formal Methods in System Design
Model checking algorithms for analog verification
Proceedings of the 39th annual Design Automation Conference
Proceedings of the 7th International Workshop on Higher Order Logic Theorem Proving and Its Applications
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Formal Verification of Synthesized Analog Designs
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures
IEEE Transactions on Software Engineering
Verification of analog/mixed-signal circuits using labeled hybrid petri nets
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A symbolic methodology for the verification of analog and mixed signal designs
Proceedings of the conference on Design, automation and test in Europe
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
Power grid analysis benchmarks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
PHAVer: algorithmic verification of hybrid systems past HyTech
International Journal on Software Tools for Technology Transfer (STTT)
Model checking of analog systems using an analog specification language
Proceedings of the conference on Design, automation and test in Europe
Efficient modeling and verification of analog/mixed-signal circuits using labeled hybrid petri nets
Efficient modeling and verification of analog/mixed-signal circuits using labeled hybrid petri nets
Reachability Analysis of Hybrid Systems Using Support Functions
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Analog/mixed-signal circuit verification using models generated from simulation traces
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Formal verification of phase-locked loops using reachability analysis and continuization
Proceedings of the International Conference on Computer-Aided Design
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Asymptotic waveform evaluation for timing analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of digital circuits through symbolic reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We present ABCD-L, a scalable technique for Analog/Mixed Signal (AMS) modelling/verification that captures the continuous dynamics of Linear Time-Invariant (LTI) systems, using purely Boolean approximations, to any desired level of accuracy. ABCD-L's models can be used in conjunction with existing techniques for Boolean synthesis/verification/fast logic simulation, or with hybrid systems frameworks, to represent LTI dynamics without incurring the penalty of adding continuous variables. Unlike existing state-enumeration approaches like DAE2FSM [1], ABCD-L scales practically linearly with system size. We apply ABCD-L to I/O links composed of RC/RLGC units, capturing important analog effects like inter-symbol interference, overshoot/undershoot, ringing, etc. -- all using purely Boolean models. We also present a continuous-time differential equalizer example, where ABCD-L accurately reproduces key design-relevant AMS metrics, including the eye diagram correction achieved by the circuit. Furthermore, for real-world LTI systems, we demonstrate that ABCD-L can be applied in conjunction with Model Order Reduction (MOR) techniques; we use this to produce accurate Boolean models of an industry-scale power grid network (with 25849 nodes) made available by IBM. We also demonstrate that Boolean simulation using ABCD-L's models offers considerable speed-up over standard circuit simulation using linear multi-step numerical methods.