Parameter independent model order reduction
Mathematics and Computers in Simulation
An efficient terminal and model order reduction algorithm
Integration, the VLSI Journal
Multiple block structure-preserving reduced order modeling of interconnect circuits
Integration, the VLSI Journal
Hierarchical Krylov subspace based reduction of large interconnects
Integration, the VLSI Journal
Statistical static timing analysis: A survey
Integration, the VLSI Journal
Analytical timing model for inductance-dominant interconnect based on traveling wave propagation
Microelectronics Journal
Modeling strategies of the input admittance of RC interconnects for VLSI CAD tools
Microelectronics Journal
Proceedings of the 49th Annual Design Automation Conference
Proceedings of the 49th Annual Design Automation Conference
An improved Elmore delay model for VLSI interconnects
Mathematical and Computer Modelling: An International Journal
Single event crosstalk prediction in nanometer technologies
Analog Integrated Circuits and Signal Processing
Resource-constrained link insertion for delay reduction
Integration, the VLSI Journal
ABCD-L: approximating continuous linear systems using boolean models
Proceedings of the 50th Annual Design Automation Conference
Decentralized and passive model order reduction of linear networks with massive ports
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Accurate current estimation for interconnect reliability analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of Electronic Testing: Theory and Applications
Mathematics and Computers in Simulation
Scalable power grid transient analysis via MOR-assisted time-domain simulations
Proceedings of the International Conference on Computer-Aided Design
An improved RC model for VLSI interconnects with applications to buffer insertion
Analog Integrated Circuits and Signal Processing
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Asymptotic waveform evaluation (AWE) provides a generalized approach to linear RLC circuit response approximations. The RLC interconnect model may contain floating capacitors, grounded resistors, inductors, and even linear controlled sources. The transient portion of the response is approximated by matching the initial boundary conditions and the first 2q-1 moments of the exact response to a lower-order q-pole model. For the case of an RC tree model, a first-order AWE approximation reduces to the RC tree methods