Topics in matrix analysis
The role of the condition number and the relative gain array in robustness analysis
Automatica (Journal of IFAC)
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources
Proceedings of the 37th Annual Design Automation Conference
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Model Order Reduction Techniques for Linear Systems with Large Numbers of Terminals
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Exploiting input information in a model reduction algorithm for massively coupled parasitic networks
Proceedings of the 41st annual Design Automation Conference
Approximation of Large-Scale Dynamical Systems (Advances in Design and Control) (Advances in Design and Control)
SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
SPRIM: structure-preserving reduced-order interconnect macromodeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Fast flip-chip power grid analysis via locality and grid shells
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Proceedings of the 2006 international symposium on Physical design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A more reliable reduction algorithm for behavioral model extraction
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An efficient method for terminal reduction of interconnect circuits considering delay variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A sliding window scheme for accurate clock mesh analysis
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Power grid physics and implications for CAD
Proceedings of the 43rd annual Design Automation Conference
Model order reduction of linear networks with massive ports via frequency-dependent port packing
Proceedings of the 43rd annual Design Automation Conference
SBPOR: second-order balanced truncation for passive order reduction of RLC circuits
Proceedings of the 44th annual Design Automation Conference
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
DeMOR: decentralized model order reduction of linear networks with massive ports
Proceedings of the 45th annual Design Automation Conference
ETBR: extended truncated balanced realization method for on-chip power grid network analysis
Proceedings of the conference on Design, automation and test in Europe
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Passive rational interpolation-based reduction via Carathéodory extension for general systems
IEEE Transactions on Circuits and Systems II: Express Briefs
Efficient model reduction of interconnects via double gramians approximation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Asymptotic waveform evaluation for timing analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Guaranteed passive balancing transformations for model order reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Poor man's TBR: a simple model reduction scheme
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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It is well known that model order reduction for circuits with many terminals remains a challenging problem. One reason is that existing approaches are based on a centralized framework, in which each input-output pair is implicitly assumed to be equally interacted and the matrix-valued transfer function is assumed to be fully populated. In this paper, we attempt to address this long-standing problem using a decentralized model order reduction scheme, in which a multi-input multi-output system is decoupled into a number of subsystems and each subsystem corresponds to one output and several dominant inputs. The decoupling process is based on the relative gain array, which measures the degree of interaction of each input-output pair. For each decoupled subsystem, passive reduction can be easily achieved using existing reduction techniques. The proposed method is suitable for resistance-dominant interconnects such as on-chip power grids, substrate planes where extremely compact models can be obtained. Simulation results demonstrate the advantage of the proposed method compared to the existing approaches.