An efficient method for terminal reduction of interconnect circuits considering delay variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Parameterized macromodeling for analog system-level design exploration
Proceedings of the 44th annual Design Automation Conference
Parameterized model order reduction via a two-directional Arnoldi process
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
DeMOR: decentralized model order reduction of linear networks with massive ports
Proceedings of the 45th annual Design Automation Conference
ETBR: extended truncated balanced realization method for on-chip power grid network analysis
Proceedings of the conference on Design, automation and test in Europe
SPARE: a Scalable algorithm for passive, structure preserving, Parameter-Aware model order REduction
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
ARMS - automatic residue-minimization based sampling for multi-point modeling techniques
Proceedings of the 46th Annual Design Automation Conference
Statistical analysis of large on-chip power grid networks by variational reduction scheme
Integration, the VLSI Journal
Efficient methods for large resistor networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SPARE: a scalable algorithm for passive, structure preserving, parameter-aware model order reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
HORUS - high-dimensional model order reduction via low moment-matching upgraded sampling
Proceedings of the Conference on Design, Automation and Test in Europe
On the efficient reduction of complete EM based parametric models
Proceedings of the Conference on Design, Automation and Test in Europe
Efficient model reduction of interconnects via double gramians approximation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Balanced truncation for time-delay systems via approximate Gramians
Proceedings of the 16th Asia and South Pacific Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient analytical macromodeling of large analog circuits by transfer function trajectories
Proceedings of the International Conference on Computer-Aided Design
3POr: parallel projection based parameterized order reduction for multi-dimensional linear models
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 49th Annual Design Automation Conference
Fast timing analysis of clock networks considering environmental uncertainty
Integration, the VLSI Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Decentralized and passive model order reduction of linear networks with massive ports
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This work presents a model reduction algorithm motivated by a connection between frequency-domain projection methods and approximation of truncated balanced realizations. The method is computationally simple to implement, has near-optimal error properties, and possesses simple error estimation and order-control procedures. Usage of the method also enables straightforward exploitation of information about the particular application and setting, as well as circuit functional information, such as frequency weighting information and correlations between network port waveforms. When such specific information is available, standard truncated balanced realization algorithms generate models far from optimal according to statistical decision criteria. Examples are shown to demonstrate that the method can outperform the standard order reduction techniques by providing similar accuracy with lower order models or superior accuracy for the same size model.