DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
IES3: a fast integral equation solver for efficient 3-dimensional extraction
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Model Order Reduction Techniques for Linear Systems with Large Numbers of Terminals
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Exploiting input information in a model reduction algorithm for massively coupled parasitic networks
Proceedings of the 41st annual Design Automation Conference
Model Reduction of MIMO Systems via Tangential Interpolation
SIAM Journal on Matrix Analysis and Applications
SPRIM: structure-preserving reduced-order interconnect macromodeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
An efficient method for terminal reduction of interconnect circuits considering delay variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
DeMOR: decentralized model order reduction of linear networks with massive ports
Proceedings of the 45th annual Design Automation Conference
Sparse implicit projection (SIP) for reduction of general many-terminal networks
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Allocating power ground vias in 3D ICs for simultaneous power and thermal integrity
ACM Transactions on Design Automation of Electronic Systems (TODAES)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 49th Annual Design Automation Conference
Fast Statistical Full-Chip Leakage Analysis for Nanometer VLSI Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Decentralized and passive model order reduction of linear networks with massive ports
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Model order reduction has been a driving force for reducing analysis complexity of VLSI systems containing large linear networks. However, most existing reduction techniques are only applicable to networks with a small number of ports, failing to fulfill an even stronger need of reducing massively interconnected subsystems such as power grids and wide buses. In this paper, a port packing scheme is presented wherein the correlation between circuit ports is explored in a frequency-dependent manner. In the proposed McPack Multiport Circuit Packing) algorithm, port packing is combined with a practical realization of the recently developed tangential interpolation scheme for model reduction. McPack performs feasible moment matching for networks with many ports in the sense of tangential interpolation. With guaranteed passivity, extensibility to multi-point expansion as well as comparable complexity, McPack systematically introduces frequency-domain port packing into the existing projection-based model order reduction framework. For several large networks with high port count, the presented algorithm is shown to be significantly more accurate than the standard block-moment matching algorithm as well as other recently developed alternative.