Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Spectral partitioning with multiple eigenvectors
Discrete Applied Mathematics - Special volume on VLSI
Time Series Analysis: Forecasting and Control
Time Series Analysis: Forecasting and Control
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A New Look at Proper Orthogonal Decomposition
SIAM Journal on Numerical Analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
On clusterings: Good, bad and spectral
Journal of the ACM (JACM)
Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Analysis for Complex Power Distribution Networks Considering Densely Populated Vias
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Thermal via placement in 3D ICs
Proceedings of the 2005 international symposium on Physical design
Partitioning-based approach to fast on-chip decap budgeting and minimization
Proceedings of the 42nd annual Design Automation Conference
Demystifying 3D ICs: The Pros and Cons of Going Vertical
IEEE Design & Test
Physical Design for 3D System on Package
IEEE Design & Test
Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A thermal-driven floorplanning algorithm for 3D ICs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Efficient full-chip thermal modeling and analysis
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Integrating dynamic thermal via planning with 3D floorplanning algorithm
Proceedings of the 2006 international symposium on Physical design
Thermal via planning for 3-D ICs
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An efficient method for terminal reduction of interconnect circuits considering delay variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Proceedings of the 43rd annual Design Automation Conference
Model order reduction of linear networks with massive ports via frequency-dependent port packing
Proceedings of the 43rd annual Design Automation Conference
IBM Journal of Research and Development - POWER5 and packaging
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
Proceedings of the 2006 international symposium on Low power electronics and design
Simultaneous power and thermal integrity driven via stapling in 3D ICs
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Off-chip decoupling capacitor allocation for chip package co-design
Proceedings of the 44th annual Design Automation Conference
Spectral Clustering, Ordering and Ranking: Statistical Learning with Matrix Factorizations
Spectral Clustering, Ordering and Ranking: Statistical Learning with Matrix Factorizations
iTEM: a temperature-dependent electromigration reliability diagnosis tool
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Decoupling capacitance allocation and its application to power-supply noise-aware floorplanning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hierarchical analysis of power distribution networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis and optimization of structured power/ground networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Temperature and supply Voltage aware performance and power modeling at microarchitecture level
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-Efficiency Green Function-Based Thermal Simulation Algorithms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
NEMS based thermal management for 3D many-core system
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
SPECO: Stochastic Perturbation based Clock tree Optimization considering temperature uncertainty
Integration, the VLSI Journal
Proceedings of the 50th Annual Design Automation Conference
Distributed TSV topology for 3-D power-supply networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
TSV redundancy: architecture and design issues in 3-D IC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The existing work on via allocation in 3D ICs ignores power/ground vias' ability to simultaneously reduce voltage bounce and remove heat. This article develops the first in-depth study on the allocation of power/ground vias in 3D ICs with simultaneous consideration of power and thermal integrity. By identifying principal ports and parameters, effective electrical and thermal macromodels are employed to provide dynamic power and thermal integrity as well as sensitivity with respect to via density. With the use of sensitivity, an efficient via allocation simultaneously driven by power and thermal integrity is developed. Experiments show that, compared to sequential power and thermal optimization using static integrity, sequential optimization using the dynamic integrity reduces nonsignal vias by up to 18%, and simultaneous optimization using dynamic integrity further reduces nonsignal vias by up to 45.5%.