Review: Formal verification of analog and mixed signal designs: A survey
Microelectronics Journal
The Case for Analog Circuit Verification
Electronic Notes in Theoretical Computer Science (ENTCS)
Proceedings of the International Conference on Computer-Aided Design
Formal verification of analog circuit parameters across variation utilizing SAT
Proceedings of the Conference on Design, Automation and Test in Europe
ABCD-L: approximating continuous linear systems using boolean models
Proceedings of the 50th Annual Design Automation Conference
Proceedings of the International Conference on Computer-Aided Design
Formal Verification of Analog and Mixed Signal Designs Using SPICE Circuit Simulation Traces
Journal of Electronic Testing: Theory and Applications
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The authors describe a semi-algorithmic method to extract finite-state models from an analog circuit-level model by means of homomorphic (behavior preserving) transformations. Properties to be verified are defined by ω-automata. Efficient algorithms for testing language containment of automata can then be applied to verify properties of the finite-state models. Proof of the property in the finite-state model guarantees the property in the analog circuit-level model over a continuous range of input waveforms and circuit parameters. While in practice this method applies directly only to smaller circuit components, it can be used to analyze larger circuits as well by deriving a hierarchy of increasingly abstract models, through repeated applications of homomorphic transformations. Examples of extraction, homomorphism, and verification are described