Symbolic Model Checking for Probabilistic Processes
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HSCC '99 Proceedings of the Second International Workshop on Hybrid Systems: Computation and Control
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Towards formal verification of analog designs
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Statistical probabilistic model checking with a focus on time-bounded properties
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Verification of analog/mixed-signal circuits using labeled hybrid petri nets
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
Bayesian statistical model checking with application to Simulink/Stateflow verification
Proceedings of the 13th ACM international conference on Hybrid systems: computation and control
Analog/mixed-signal circuit verification using models generated from simulation traces
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Formal verification of analog circuits in the presence of noise and process variation
Proceedings of the Conference on Design, Automation and Test in Europe
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Proceedings of the International Conference on Computer-Aided Design
Bayesian statistical model checking with application to Stateflow/Simulink verification
Formal Methods in System Design
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We show how statistical Model Checking can be used for verifying properties of analog circuits. As integrated circuit technologies scale down, manufacturing variations in devices make analog designs behave like stochastic systems. The problem of verifying stochastic systems is often difficult because of their large state space. Statistical Model Checking can be an efficient verification technique for stochastic systems. In this paper, we use sequential statistical techniques and model checking to verify properties of analog circuits in both the temporal and the frequency domain. In particular, randomly sampled system traces are sequentially generated by SPICE and passed to a trace checker to determine whether they satisfy a given specification, until the desired statistical strength is achieved.