A formal approach to verification of linear analog circuits wth parameter tolerances

  • Authors:
  • L. Hedrich;E. Barke

  • Affiliations:
  • Institute of Microelectronic Systems, University of Hanover, Germany;Institute of Microelectronic Systems, University of Hanover, Germany

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 1998

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Abstract

This contribution presents an approach to formal verification of linear analog circuits with parameter tolerances. The method proves that an actual circuit fulfills a specification in a given frequency interval for all parameter variations. It is based on a curvature driven bound computation for value sets using interval arithmetic. Some examples demonstrate the feasibility of our approach.