Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Linear phase-portrait approximations for nonlinear hybrid systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Model checking
Model checking algorithms for analog verification
Proceedings of the 39th annual Design Automation Conference
Simulation and the Monte Carlo Method
Simulation and the Monte Carlo Method
Ellipsoidal Techniques for Reachability Analysis
HSCC '00 Proceedings of the Third International Workshop on Hybrid Systems: Computation and Control
On Discrete Modeling and Model Checking for Nonlinear Analog Systems
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Verification Tools for Finite-State Concurrent Systems
A Decade of Concurrency, Reflections and Perspectives, REX School/Symposium
Analog circuit sizing based on formal methods using affine arithmetic
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Proceedings of the 40th annual Design Automation Conference
Refinement of Mixed-Signal Systems with Affine Arithmetic
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Analog circuit simulation using range arithmetics
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Approximating Continuous Systems by Timed Automata
FMSB '08 Proceedings of the 1st international workshop on Formal Methods in Systems Biology
Time Constrained Verification of Analog Circuits using Model-Checking Algorithms
Electronic Notes in Theoretical Computer Science (ENTCS)
Robust test generation and coverage for hybrid systems
HSCC'07 Proceedings of the 10th international conference on Hybrid systems: computation and control
On systematic simulation of open continuous systems
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
HSCC'06 Proceedings of the 9th international conference on Hybrid Systems: computation and control
A Study of Variance Reduction Techniques for Estimating Circuit Yields
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of mixed-signal systems with affine arithmetic
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Embedded systems include an increasing share of analog/mixed-signal components that are tightly interwoven with functionality of digital HW/SW systems. A challenge for verification is that even small deviations in analog components can lead to significant changes in system properties. In this paper we propose the combination of range-based, semisymbolic simulation with assertion checking. We show that this approach combines advantages, but as well some limitations, of multirun simulations with formal techniques. The efficiency of the proposed method is demonstrated by several examples.