Workload-aware neuromorphic design of low-power supply voltage controller

Authors:
Saurabh Sinha;Jounghyuk Suh;Bertan Bakkaloglu;Yu Cao
Affiliations:
Arizona State University, Tempe, AZ, USA;Arizona State University, Tempe, AZ, USA;Arizona State University, Tempe, AZ, USA;Arizona State University, Tempe, AZ, USA
Venue:
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Year:
2010

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Abstract

A workload-aware low-power neuromorphic controller for dynamic voltage scaling in VLSI systems is presented. The neuromorphic controller predicts future workload values and preemptively regulates supply voltage based on past workload profile. Our specific contributions include: (1) implementation of a digital and analog version of the controller in 45nm CMOS technology, resulting in 3% performance hit with a power overhead in the range of 10-150 microwatts, (2) higher prediction accuracy compared to a software based OS-governed DVS scheme by 50%, reducing wasted power and improving error margins, (3) digital design has minimal power overhead and is more reconfigurable, while analog design is better suited for nonlinear and complex computational tasks.