A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
Handbook of Applied Cryptography
Handbook of Applied Cryptography
The Montgomery Powering Ladder
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Simplifying Quotient Determination in High-Radix Modular Multiplication
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Montgomery Modular Exponentiation on Reconfigurable Hardware
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
FPGA Montgomery Multiplier Architectures - A Comparison
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
An Improved Unified Scalable Radix-2 Montgomery Multiplier
ARITH '05 Proceedings of the 17th IEEE Symposium on Computer Arithmetic
Scalable hardware implementing high-radix Montgomery multiplication algorithm
Journal of Systems Architecture: the EUROMICRO Journal
A unified architecture for a public key cryptographic coprocessor
Journal of Systems Architecture: the EUROMICRO Journal
ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
A Practical Fault Attack on Square and Multiply
FDTC '08 Proceedings of the 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography
Parametric, Secure and Compact Implementation of RSA on FPGA
RECONFIG '08 Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs
Montgomery Exponentiation with No Final Comparisons: Improved Results
PACCS '09 Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems
An efficient RSA implementation without precomputation
Inscrypt'11 Proceedings of the 7th international conference on Information Security and Cryptology
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This paper describes an efficient architecture to perform modular exponentiation using the Montgomery Powering Ladder algorithm. The implementation is composed by two parallel modular multiplication modules in order to speed-up the modular exponentiation time. The modular multiplication architecture is high-radix and presents an one-dimensional array of processing elements within multiplexed multipliers. This architecture can performs the 1024 bits RSA decryption in 2.5 ms. Furthermore, the modular exponentiation architecture presents a countermeasure against SPA attack.