Algorithm-Based Fault Detection for Signal Processing Applications
IEEE Transactions on Computers
Algorithm-Based Fault Tolerance for FFT Networks
IEEE Transactions on Computers
Proceedings of the 15th symposium on Integrated circuits and systems design
Reliable low-power digital signal processing via reduced precision redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy-efficient soft error-tolerant digital signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Algorithm-Based Fault Tolerance for Matrix Operations
IEEE Transactions on Computers
Low-Power Filtering Via Minimum Power Soft Error Cancellation
IEEE Transactions on Signal Processing
Reduced-precision redundancy on FPGAs
International Journal of Reconfigurable Computing
| Hi-index | 0.00 |
Soft errors are becoming an increasingly important issue for circuit reliability. Traditional techniques to protect against soft errors, like triple modular redundancy (TMR), have a large cost in terms of area and power. This has motivated the development of specific protection techniques for various types of circuits. In this paper, techniques to protect adaptive filters are presented, which provide reasonable reliability with reduced cost and power consumption. An adaptive equalizer case study is used to discuss and evaluate the proposed techniques in terms of both protection and cost.