Demystifying 3D ICs: The Pros and Cons of Going Vertical
IEEE Design & Test
Placement and Routing in 3D Integrated Circuits
IEEE Design & Test
Design space exploration for 3D architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures
Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures
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Three-dimensional integrated circuits (3D ICs) are the IC chips with multiple device layers stacked together with various vertical interconnect technologies. The layers could be connected with wire-bonding, through-silicon-vias (TSV), microbump, or even inductive/capacitive contact.