Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
On the Complexity of Mod-2l Sum PLA's
IEEE Transactions on Computers
Easily Testable Realizations for Generalized Reed-Muller Expressions
IEEE Transactions on Computers
A Method for Modulo-2 Minimization
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
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In this paper, we introduced a fast transformation equations for computing the code of the Dual Reed-Muller forms from the code of the product of sums. The code of Dual Reed-Muller terms are derived without the need to generate or store the transformation matrix of the Dual Reed-Muller terms. To derive Fixed Polarity Dual Reed-Muller (FPDRM) coefficients from POS coefficients using the transformation matrix would be very costly in terms of memory and CPU time. The transformation matrix requires the construction and storing of the matrix TMn which has a size of 2n by 2n for n-variables. The experimental results for this algorithm reflect the advantages of the algorithm in terms of speed, efficiency, and storage requirement.