VSPEC constraints modeling and evaluation

Authors:
Amitvikram Rajkhowa;Perry Alexander
Affiliations:
Department of Electrical and Computer Engineering, The University of Cincinnati, Cincinnati, OH;Department of Electrical and Computer Engineering, The University of Cincinnati, Cincinnati, OH
Venue:
ECBS'99 Proceedings of the 1999 IEEE conference on Engineering of computer-based systems
Year:
1999

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Abstract

Performance constraints playa key role in VLSI design. Performance constraints evaluation help in discovering requirements specification errors at an early stage in the design process when they are easy to fix. VSPEC is a requirements specification language for digital systems that contains a standard method for describing constraints. This paper presents a method of evaluating and verifYing these constraints. Performance Description Language(PDL) is used for evaluation. The system is implemented within the ORBIT design environment.