Reduced-complexity mimo detector with close-to ml error rate performance
Proceedings of the 17th ACM Great Lakes symposium on VLSI
An architecture for energy efficient sphere decoding
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Relaxed K-best MIMO signal detector design and VLSI implementation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-throughput low-complexity MIMO detector based on K-best algorithm
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Algorithm and implementation of the K-best sphere decoding for MIMO detection
IEEE Journal on Selected Areas in Communications
Soft-output sphere decoding: algorithms and VLSI implementation
IEEE Journal on Selected Areas in Communications
IEEE Journal on Selected Areas in Communications
VLSI implementation of a fixed-complexity soft-output MIMO detector for high-speed wireless
EURASIP Journal on Wireless Communications and Networking
Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding
Journal of Signal Processing Systems
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MIMO wireless technology is required to increase the data rates for a broad range of applications, including low cost mobile devices. In this paper we present a very low area reconfigurable MIMO detector which achieves a high throughput of 103Mbps and uses 27 Kilo Gates when implemented in a commercial 180nm CMOS process. The low area is achieved by the proposed in-place architecture. This architecture implements the K-best algorithm and reduces area 4-fold compared to the widely used multi-stage architecture, while provides reconfigurability in terms of antenna configuration during real-time operation.