Reliability aware through silicon via planning for 3D stacked ICs

Authors:
Amirali Shayan;Xiang Hu;He Peng;Chung-Kuan Cheng;Wenjian Yu;Mikhail Popovich;Thomas Toms;Xiaoming Chen
Affiliations:
University of California, San Diego, CA;University of California, San Diego, CA;University of California, San Diego, CA;University of California, San Diego, CA;Tsinghua University, Beijing, China;Qualcomm Inc., San Diego, CA;Qualcomm Inc., San Diego, CA;Qualcomm Inc., San Diego, CA
Venue:
Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2009

Citing 1
Cited 5

Power and reliability management of SoCs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

3D stacked power distribution considering substrate coupling

ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Adaptive inter-layer message routing in 3D networks-on-chip

Microprocessors & Microsystems
Modeling of peak-to-peak core switching noise, output impedance, and decoupling capacitance along a vertical chain of power distribution TSV pairs

Analog Integrated Circuits and Signal Processing
Reliability-Aware Heterogeneous 3D Chip Multiprocessor Design

Journal of Electronic Testing: Theory and Applications
TSV redundancy: architecture and design issues in 3-D IC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This work proposes reliability aware through silicon via (TSV) planning for the 3D stacked silicon integrated circuits (ICs). The 3D power distribution network is modeled and extracted in frequency domain which includes the impact of skin effect. The worst case power noise of the 3D power delivery networks (PDN) with local TSV failures resulting from fabrication process or circuit operation is identified in both frequency and time domain. From the experimental results, it is observed that a single TSV failure could increase the maximum voltage variation up to 70% which should be considered in nanoscale ICs. The parameters of the 3D PDN are designed such that the power distribution is reliable under local TSV failures. The spatial distribution of the power noise, reliability and block out area is analyzed to enhance the reliability of the 3D PDN under local TSV failure.