UMTS MPSoC design evaluation using a system level design framework

  • Authors:
  • Douglas Densmore;Alena Simalatsar;Abhijit Davare;Roberto Passerone;Alberto Sangiovanni-Vincentelli

  • Affiliations:
  • University of California, Berkeley;University of Trento;Intel Corporation;University of Trento;University of California, Berkeley

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2009

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Abstract

Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design framework, Metro II, to carry out simulation and design space exploration of multi-core architectures. We illustrate the design methodology on a UMTS data link layer design case study with both a timed and untimed functional model as well as a complete set of MPSoC architectural services. We compare different architectures (including RTOSes) explored with Metro II and quantify the associated simulation overhead.