Code placement techniques for cache miss rate reduction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analysis of Cache-Related Preemption Delay in Fixed-Priority Preemptive Scheduling
IEEE Transactions on Computers
Completion time multiple branch prediction for enhancing trace cache performance
Proceedings of the 27th annual international symposium on Computer architecture
Data cache locking for higher program predictability
SIGMETRICS '03 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Adding instruction cache effect to schedulability analysis of preemptive real-time systems
RTAS '96 Proceedings of the 2nd IEEE Real-Time Technology and Applications Symposium (RTAS '96)
An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Efficient microarchitecture modeling and path analysis for real-time software
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
A low-cost memory architecture with NAND XIP for mobile embedded systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Compiler-assisted demand paging for embedded systems with flash memory
Proceedings of the 4th ACM international conference on Embedded software
Real-time garbage collection for flash-memory storage systems of real-time embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
WCET Centric Data Allocation to Scratchpad Memory
RTSS '05 Proceedings of the 26th IEEE International Real-Time Systems Symposium
CFLRU: a replacement algorithm for flash memory
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
A multi-channel architecture for high-performance NAND flash-based storage system
Journal of Systems Architecture: the EUROMICRO Journal
Impact of Cache Partitioning on Multi-tasking Real Time Embedded Systems
RTCSA '08 Proceedings of the 2008 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
Real-Time Program Execution on NAND Flash Memory for Portable Media Players
RTSS '08 Proceedings of the 2008 Real-Time Systems Symposium
RTSS '09 Proceedings of the 2009 30th IEEE Real-Time Systems Symposium
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
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For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost mean of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2KB page-based read operations not per-byte random access, which requires RAM as working storage for code executions. In order to minimize the expensive RAM requirements, the proposed framework optimally partitions the RAM for multiple hard real-time tasks and optimally determines the pinning/LRU combination for each RAM partition such that all task deadlines are deterministically guaranteed. The proposed framework is verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.