Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
A Framework for Boundary-Scan Based System Test Diagnosis
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Functional Testing of Current Microprocessors (applied to the Intel i860TM)
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
BIST Techniques for ASIC Design
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Applications of the IEEE P1149.5 Module Test and Maintenance Bus
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
| Hi-index | 0.00 |
In their purest form, BIST, BScan and Scan do not lend themselves to in-service test - compromises and extensions are required. We describe the experience of implementing built-in fault detection and location in a large digital system.