Board-level diagnosis by signature analysis

  • Authors:

  • M. G. Karpovsky;P. Nagvajara

  • Affiliations:

  • Research Laboratory for Design and Testing of Computer and Communication Systems, Department of Electrical, Computer and System Engineering, Boston University, Boston, Massachusetts;Research Laboratory for Design and Testing of Computer and Communication Systems, Department of Electrical, Computer and System Engineering, Boston University, Boston, Massachusetts

  • Venue:
  • ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
  • Year:
  • 1988

Quantified Score

Hi-index 0.00

Visualization

Abstract

Board-level diagnostic techniques by signature analysis based on single-error-correcting Hamming codes over GF(2M) (where M is the number of outputs per chip) are presented. We consider two techniques: (i) the space-time compressor technique for the case when responses from N chips on the board are wired to the compressor and (ii) the time compressor technique for the case when test responses from each chip are transferred to the compressor via system bus. Assuming a singlefaulty-chip model, a faulty chip on the boardunder-test is located by an analysis of the relationship between the distortions in the obtained signatures. Both techniques for boardlevel diagnosis require less hardware than the straightforward diagnostic techniques using (i) built-in signature analyzer for every chip or (ii) selectively testing of each chip via system bus, hence offer an efficient approach for a design of a built-in-self-test board and for manufacturing testing.