Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Accelerated transition fault simulation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Parallel computation of non-deterministic algorithms in vlsi
Parallel computation of non-deterministic algorithms in vlsi
TTL Cookbook
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We discuss an approach to merging Boundary Scan with Ruilt-In Self-Test. The proposed implementation of Boundary Scan represents a snapshot of the Joint Test Advisory Group Recommendation 1.0, while the Built-In Self-Test implements the features of cellular automata. We examine test patterns generated from two distinct sources, one with registers using cellular automata and the other, based on the conventional LFSR configuration. We analyze and illustrate distinctive effects of these patterns on fault coverage of specific designs.