Evaluation of system BIST using computational performance measures

Authors:
David L. Landis;Daniel C. Muha
Affiliations:
The Pennsylvania State University, Department of Electrical Engineering, University Park, PA;The Pennsylvania State University, Department of Electrical Engineering, University Park, PA
Venue:
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Year:
1988

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Abstract

This paper examines chip and system level Built-In Self-Test (BIST) techniques for dependable computer system applications. Computational performance metrics are quantitatively evaluated in addition to traditional area and fault coverage measures.