Efficient event processing through reconfigurable hardware for algorithmic trading

  • Authors:
  • Mohammad Sadoghi;Martin Labrecque;Harsh Singh;Warren Shum;Hans-Arno Jacobsen

  • Affiliations:
  • University of Toronto;University of Toronto;University of Toronto;University of Toronto;University of Toronto

  • Venue:
  • Proceedings of the VLDB Endowment
  • Year:
  • 2010

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Abstract

In this demo, we present fpga-ToPSS (Toronto Publish/Subscribe System Family), an efficient event processing platform for high-frequency and low-latency algorithmic trading. Our event processing platform is built over reconfigurable hardware---FPGAs---to achieve line-rate processing. Furthermore, our event processing engine supports Boolean expression matching with an expressive predicate language that models complex financial strategies to autonomously buy and sell stocks based on real-time financial data.