SIGGRAPH '86 Proceedings of the 13th annual conference on Computer graphics and interactive techniques
An improved illumination model for shaded display
Communications of the ACM
Perception-guided global illumination solution for animation rendering
Proceedings of the 28th annual conference on Computer graphics and interactive techniques
Spatiotemporal sensitivity and visual attention for efficient rendering of dynamic environments
ACM Transactions on Graphics (TOG)
SIGGRAPH '84 Proceedings of the 11th annual conference on Computer graphics and interactive techniques
Photon mapping on programmable graphics hardware
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Ray tracing on a stream processor
Ray tracing on a stream processor
RPU: a programmable ray processing unit for realtime ray tracing
ACM SIGGRAPH 2005 Papers
Multi-level ray tracing algorithm
ACM SIGGRAPH 2005 Papers
Ray tracing animated scenes using coherent grid traversal
ACM SIGGRAPH 2006 Papers
Selective rendering: computing only what you see
Proceedings of the 4th international conference on Computer graphics and interactive techniques in Australasia and Southeast Asia
Ray tracing deformable scenes using dynamic bounding volume hierarchies
ACM Transactions on Graphics (TOG)
Packet-based whitted and distribution ray tracing
GI '07 Proceedings of Graphics Interface 2007
Asynchronous BVH construction for ray tracing dynamic scenes on parallel multi-core architectures
EG PGV'07 Proceedings of the 7th Eurographics conference on Parallel Graphics and Visualization
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Current parallel graphics algorithms minimise memory access latency by tracing packets of coherent rays. This coherency, however, breaks down after several bounces, and is unsuited to acceleration techniques such as selective rendering. This paper presents an unbiased path tracing algorithm which is insensitive to the coherency of the rays traced, allowing it to run on diverse architectures including massively SIMD processors. Bins of path-atoms are created and processed to form a path tracing circular buffer. Latency is hidden by n-buffering the load/save operations between bins. We demonstrate our approach as an implementation on the massively parallel SIMD architecture, the ClearSpeed CSX600.