Communicating sequential processes
Communications of the ACM
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Instrumenting Bitstreams for Debugging FPGA Circuits
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Scan-chain based watch-points for efficient run-time debugging and verification of FPGA designs
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
ISVLSI '08 Proceedings of the 2008 IEEE Computer Society Annual Symposium on VLSI
Why Smalltalk wins the host languages shootout
IWST '09 Proceedings of the International Workshop on Smalltalk Technologies
MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk
Proceedings of the International Workshop on Smalltalk Technologies
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Agile programming aware computer scientists know how much productivity they owe to their development environments, and more precisely to advanced debuggers. Indeed, debuggers are mandatory to support an optimistic do-fix-rerun approach. This development scheme does not make sense in hardware design where agile has a different meaning; it refers to reconfigurable architectures. Despite such architectures support tailoring and refactoring application circuits and promote short development cycles, the overall programing scheme still conforms to waterfall models and component based integration. This paper presents a path to offer probe-based development to hardware designers, and introduces our Red Pill environment that merges several abstraction levels ranging from C like parallel coding to hardware realization embedding debug facility. Red Pill is developed using VisualWorks and reproduces some of Cincom Smalltalk browser well known features that traditionally lack when validating circuits.