Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing
IEEE Transactions on Computers
An Advanced Fault Isolation System for Digital Logic
IEEE Transactions on Computers
IBM Journal of Research and Development
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Parallel pseudorandom sequences for use in built-in test are discussed. Some of the desired properties of such sequences are unique to the two-dimensional nature of these sequences. A conventional LFSR with parallel output is shown to be a poor choice for such a generator. A compact generator that provides sequences with the desired properties is described.